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-rw-r--r--cpu/idt.c13
-rw-r--r--cpu/io.h1
-rw-r--r--cpu/io.s10
-rw-r--r--drivers/pci.c16
-rw-r--r--drivers/pci.h2
-rw-r--r--drivers/rtl8139.c106
6 files changed, 138 insertions, 10 deletions
diff --git a/cpu/idt.c b/cpu/idt.c
index 60ab441..90bd56e 100644
--- a/cpu/idt.c
+++ b/cpu/idt.c
@@ -60,6 +60,7 @@ kernel_general_protection_fault(kernel_registers_t *regs) {
kprintf(" Error Code: %x\n", regs->error_code);
kprintf("Instruction Pointer: %x\n", regs->eip);
dump_backtrace(12);
+ asm("hlt");
for (;;)
;
EOI(0xD - 8);
@@ -257,9 +258,15 @@ void idt_init(void) {
PIC_remap(0x20);
// IRQ_set_mask(0xc);
- IRQ_set_mask(0xe);
- IRQ_clear_mask(2);
- IRQ_set_mask(0xB);
+ IRQ_clear_mask(0x5);
+ IRQ_clear_mask(0xB);
+ /*
+ IRQ_set_mask(0xe);
+ IRQ_set_mask(2);
+ IRQ_set_mask(1);
+ IRQ_set_mask(0);
+ IRQ_clear_mask(0x5);
+ IRQ_clear_mask(0xB);*/
idtr.interrupt_table = (struct IDT_Descriptor **)&IDT_Entry;
idtr.size = (sizeof(struct IDT_Descriptor) * IDT_MAX_ENTRY) - 1;
diff --git a/cpu/io.h b/cpu/io.h
index 5e28e86..38858a4 100644
--- a/cpu/io.h
+++ b/cpu/io.h
@@ -6,6 +6,7 @@ extern void outw(uint16_t, uint16_t);
extern void outl(uint16_t, uint32_t);
extern uint32_t inl(uint16_t);
+extern uint16_t inw(uint16_t);
extern uint16_t inb(uint16_t);
extern void rep_outsw(uint16_t count, uint16_t port, volatile void *addy);
diff --git a/cpu/io.s b/cpu/io.s
index 3c409de..31e9df0 100644
--- a/cpu/io.s
+++ b/cpu/io.s
@@ -4,6 +4,7 @@
.global outw
.global outl
.global inb
+.global inw
.global inl
.global rep_outsw
.global rep_insw
@@ -36,9 +37,9 @@ outb:
ret
outw:
- mov eax, [esp + 8]
+ mov ax, [esp + 8]
mov dx, [esp + 4]
- out dx, eax
+ out dx, ax
ret
inl:
@@ -46,6 +47,11 @@ inl:
in eax, dx
ret
+inw:
+ mov dx, [esp + 4]
+ in ax, dx
+ ret
+
inb:
mov dx, [esp + 4]
in al, dx
diff --git a/drivers/pci.c b/drivers/pci.c
index a71cc9a..cc8a42c 100644
--- a/drivers/pci.c
+++ b/drivers/pci.c
@@ -5,6 +5,22 @@
#define CONFIG_ADDRESS 0xCF8
#define CONFIG_DATA 0xCFC
+void pci_config_write32(const struct PCI_DEVICE *device, uint8_t func,
+ uint8_t offset, uint32_t data) {
+ uint32_t address;
+ uint32_t lbus = (uint32_t)device->bus;
+ uint32_t lslot = (uint32_t)device->slot;
+ uint32_t lfunc = (uint32_t)func;
+
+ // Create configuration address as per Figure 1
+ address = (uint32_t)((lbus << 16) | (lslot << 11) | (lfunc << 8) |
+ (offset & 0xFC) | ((uint32_t)0x80000000));
+
+ // Write out the address
+ outl(CONFIG_ADDRESS, address);
+ outl(CONFIG_DATA, data);
+}
+
uint32_t pci_config_read32(const struct PCI_DEVICE *device, uint8_t func,
uint8_t offset) {
uint32_t address;
diff --git a/drivers/pci.h b/drivers/pci.h
index 6a8bc1c..855a7de 100644
--- a/drivers/pci.h
+++ b/drivers/pci.h
@@ -9,6 +9,8 @@ struct PCI_DEVICE {
uint32_t pci_config_read32(const struct PCI_DEVICE *device, uint8_t func,
uint8_t offset);
+void pci_config_write32(const struct PCI_DEVICE *device, uint8_t func,
+ uint8_t offset, uint32_t data);
int pci_populate_device_struct(uint16_t vendor, uint16_t device,
struct PCI_DEVICE *pci_device);
diff --git a/drivers/rtl8139.c b/drivers/rtl8139.c
index 44212e0..439b9f3 100644
--- a/drivers/rtl8139.c
+++ b/drivers/rtl8139.c
@@ -1,4 +1,5 @@
#include <assert.h>
+#include <cpu/idt.h>
#include <cpu/io.h>
#include <drivers/pci.h>
#include <drivers/rtl8139.h>
@@ -8,9 +9,72 @@
#define CMD 0x37
#define IMR 0x3C
+#define TSD0 0x10 // transmit status
+#define TSAD0 0x20 // transmit start address
+
struct PCI_DEVICE rtl8139;
uint8_t device_buffer[8192 + 16];
+__attribute__((interrupt)) void test_handler(void *regs) {
+ kprintf("RUNNING TEST HANDLER :D\n");
+ for (;;)
+ ;
+}
+
+uint8_t pci_get_interrupt_line(const struct PCI_DEVICE *device) {
+ return pci_config_read32(device, 0, 0x3C) & 0xFF;
+}
+
+void pci_set_interrupt_line(const struct PCI_DEVICE *device, uint8_t line) {
+ uint32_t reg = pci_config_read32(device, 0, 0x3C);
+ reg &= ~(0xFF);
+ reg |= line;
+ pci_config_write32(device, 0, 0x3C, reg);
+}
+
+void rtl8139_send_transmit_size(
+ uint32_t base_address /*specify device instead of base_address*/,
+ uint32_t size) {
+ // Sets the OWN flag to '1'
+ uint32_t status_register = inl(base_address + 0x10);
+ status_register &= ~(1 << 13);
+ outl(base_address + 0x10, status_register);
+}
+
+void rtl8139_send_transmit_buffer(uint32_t base_address, uint16_t buffer_size) {
+ uint32_t status_register = inl(base_address + 0x10);
+ // The size of this packet
+ status_register &= ~(0x1fff);
+ status_register |= buffer_size;
+
+ // the early transmit threshol
+ status_register |= 1 << 16;
+
+ // Sets the OWN flag to '0'
+ status_register &= ~(1 << 13);
+ outl(base_address + 0x10, status_register);
+ // Check if the OWN flag is '1'
+ for (; !((inl(base_address + 0x10) >> 13) & 1);)
+ ;
+ // Check if the TOK flag is '1'
+ for (; !((inl(base_address + 0x10) >> 15) & 1);)
+ ;
+ kprintf("TOK(IMR): %x\n", (inw(base_address + 0x3C) >> 2) & 0x1);
+ kprintf("TER(IMR): %x\n", (inw(base_address + 0x3C) >> 3) & 0x1);
+
+ kprintf("TOK(ISR): %x\n", (inw(base_address + 0x3E) >> 2) & 0x1);
+ kprintf("TER(ISR): %x\n", (inw(base_address + 0x3E) >> 3) & 0x1);
+}
+
+uint8_t rtl8139_get_transmit_status(uint32_t base_address) {
+ uint32_t status_register = inl(base_address + 0x3E);
+ if ((status_register >> 3) & 0x1)
+ kprintf("transmit error :(\n");
+ uint8_t status = (status_register >> 2) & 0x1;
+ outl(base_address + 0x3E, 0x5);
+ return status;
+}
+
void rtl8139_init(void) {
if (!pci_populate_device_struct(0x10EC, 0x8139, &rtl8139)) {
kprintf("RTL8139 not found :(\n");
@@ -21,10 +85,19 @@ void rtl8139_init(void) {
uint8_t header_type = (pci_config_read32(&rtl8139, 0, 0xC) >> 16) & 0xFF;
assert(0 == header_type);
- uint32_t base_address = pci_config_read32(&rtl8139, 0, 0x10);
- uint8_t interrupt_line = pci_config_read32(&rtl8139, 0, 0x3C);
+ uint32_t base_address = pci_config_read32(&rtl8139, 0, 0x10) & (~0x3);
+ uint8_t interrupt_line = pci_get_interrupt_line(&rtl8139);
+ kprintf("base_address: %x\n", base_address);
kprintf("interrupt_line: %x\n", interrupt_line);
+ // Read the MAC address
+ kprintf("MAC: %x\n", inl(base_address));
+
+ // Enable bus mastering
+ // uint32_t register1 = pci_config_read32(&rtl8139, 0, 0x4);
+ // register1 |= (1 << 2);
+ // pci_config_write32(&rtl8139, 0, 0x4, register1);
+
// Turning on the device
outb(base_address + 0x52, 0x0);
@@ -38,13 +111,36 @@ void rtl8139_init(void) {
outl(base_address + RBSTART, rx_buffer);
// Set IMR + ISR
- outw(base_address + IMR, 0x0005); // Sets the TOK and ROK bits high
+ outw(base_address + IMR, (1 << 2) | (1 << 3));
+
+ // Enable recieve and transmitter
+ outb(base_address + 0x37,
+ (1 << 2) | (1 << 3)); // Sets the RE and TE bits high
// Configure the recieve buffer
outl(base_address + 0x44,
0xf | (1 << 7)); // (1 << 7) is the WRAP bit, 0xf is AB+AM+APM+AAP
- // Enable recieve and transmitter
- outb(base_address + 0x37, 0x0C); // Sets the RE and TE bits high
+ uint8_t *send_buffer = ksbrk(0x1000);
+ install_handler(test_handler, INT_32_INTERRUPT_GATE(0x0),
+ 0x20 + interrupt_line);
asm("sti");
+ kprintf("virt: %x\n", (uint32_t)virtual_to_physical(send_buffer, NULL));
+ outl(base_address + 0x20, (uint32_t)virtual_to_physical(send_buffer, NULL));
+ for (int i = 0; i < 10; i++) {
+ uint8_t status = rtl8139_get_transmit_status(base_address);
+ kprintf("status: %x\n", status);
+ rtl8139_send_transmit_buffer(base_address, 70);
+ status = rtl8139_get_transmit_status(base_address);
+ kprintf("status: %x\n", status);
+
+ // Clear TOK(ISR)
+ uint32_t tmp = inw(base_address + 0x3E);
+ tmp &= ~(1 << 2);
+ outw(base_address + 0x3E, tmp);
+ }
+ for (;;)
+ asm("sti");
+
+ // uint32_t physical_start_address = inl(base_address + 0x20);
}
generated by cgit v1.2.3 (git 2.39.1) at 2025-04-16 08:04:54 +0000